New research paper titled “Supervised Learning for Cover-Directed Test Selection in Simulation-Based Verification” from researchers at the University of Bristol and Infineon Technologies.
Summary:
“Constrained randomness test generation is one of the most widely adopted methods for generating stimuli for simulation-based verification. Randomness leads to test diversity, but tests tend to repeatedly exert the same design logic.Constraints are written (usually manually) to direct random tests to logic that is interesting, hard to achieve, and still untested.However, as verification progresses, most constrained random tests have only little or no effect on functional coverage If stimuli generation is much less resource intensive than simulation, a better approach is to randomly generate a large number of tests, select the most efficient subset, and to simulate only this subset.In this article, we introduce a new method for automatic extraction of constraints and e selection of tests. This method, which we call coverage-directed test selection, is based on supervised learning from coverage feedback. Our method directs the selection towards tests that have a high probability of increasing functional coverage, and prioritizes them for simulation. We show how coverage-based test selection can reduce manual constraint writing, prioritize effective tests, reduce verification resource consumption, and speed up coverage closure on a large, real-world industrial hardware design.
Find the technical sheet here. Published in May 2022.
Masamba, Nyasha, Kerstin Eder and Tim Blackmore. “Supervised learning for coverage-directed test selection in simulation-based verification.” preprint arXiv arXiv:2205.08524 (2022).
Further reading:
Semiconductor design and engineering systems chain
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The Challenges of Incremental Verification
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